The present invention relates to a waveform conversion circuit, and more particularly, to a sinusoidal-to-square waveform conversion circuit that reduces power-supply-induced jitter in the resultant square wave signal.
In many electrical systems, there is a need to convert a sine wave from an oscillator, a power splitter, or other RF device into a square wave suitable for use by a digital logic circuit. There are numerous techniques for sinusoidal-to-square waveform conversion, among which a typical one is to use a CMOS inverter as shown in FIGS. 1A and 1B. FIG. 1A shows a typical CMOS inverter 100 that is commonly used in a conventional sinusoidal-to-square waveform conversion circuit, and FIG. 1B shows a transfer curve for the CMOS inverter 100.
As shown in FIG. 1A, the CMOS inverter 100 includes a first NMOS transistor 102 and a second PMOS transistor 104, which have their gates connected together and receive an input signal IN and their drain connected together to provide an output signal OUT. The second PMOS transistor 104 has a source coupled to a power supply voltage VDD, while the source of the first NMOS transistor is connected to ground.
FIG. 1B depicts a transfer curve of the CMOS inverter 100. When the input voltage Ui is at a low level, the first NMOS transistor 102 turns off and the second PMOS transistor 104 turns on. Thus, the output voltage UO goes high. On the other hand, if the input voltage Ui is high, the first NMOS transistor 102 turns on and the second PMOS transistor 104 turns off. Thus, the output voltage UO goes low. In a certain transition region between the low and high levels, both transistors 102 and 104 turn on and operate in a saturation state. At this point, the output voltage UO varies sharply with a small fluctuation of the input voltage Ui (point Q in FIG. 1B), resulting in a high gain. In a conventional sinusoidal-to-square waveform conversion circuit using the CMOS inverter 100, a static operation point of the CMOS inverter 100 can be biased by a DC component in the input signal IN in the high gain region, for example, at the point Q shown in FIG. 1B, and an AC component such as a sine wave signal in the input signal IN can be reverse amplified and reshaped into a square wave signal. In this regard, the CMOS inverter 100 is also called an inverting amplifier.
The CMOS inverter 100 is commonly used in conventional sinusoidal-to-square waveform conversion circuits due to its simple structure. However, it also has some shortcomings. For example, the CMOS inverter 100 has poor performance in rejecting power supply noise. Noise in the power supply voltage (VDD or GND) may cause jitter in the resulting square wave signal OUT, which prevents the waveform conversion circuit from being used in some high speed systems.
One way to combat power supply noise is to use a full differential architecture. In some cases, however, using a differential circuit is not feasible because the signal source may be single-ended. Another method to reduce power supply noise is to use a good regulator to produce a clean power supply voltage. However, the regulator consumes more power and requires additional circuit area.
Accordingly, there is a need for an improved sinusoidal-to-square waveform conversion circuit that overcomes one or more of the above problems.